ABOUT US
Project Team
Our team consists of three dedicated engineering students working collaboratively on the VLSINOVA motion estimator project. Each member brings unique expertise and participates in all aspects of the project from RTL design to final documentation.
Aaron Singh
VLSI Graduate Researcher
Key Contributions:
- RTL Verilog coding and verification of motion estimator design
- Testbench development and comprehensive simulation testing
- Synthesis optimization and timing analysis for 14nm CMOS
- Physical design implementation and layout verification
Arthur Wang
VLSI Graduate Researcher
Key Contributions:
- RTL Verilog coding and verification of motion estimator design
- Testbench development and comprehensive simulation testing
- Synthesis optimization and timing analysis for 14nm CMOS
- Physical design implementation and layout verification
Nick Davidson
VLSI Graduate Researcher
Key Contributions:
- RTL Verilog coding and verification of motion estimator design
- Testbench development and comprehensive simulation testing
- Synthesis optimization and timing analysis for 14nm CMOS
- Physical design implementation and layout verification
Course Information
ENGR 852 at San Francisco State University
Course:ENGR 852 - Advanced Digital Design
Institution:San Francisco State University
Department:Electrical Engineering
Lab:NeCRL - Nano Electronics & Computing Research Lab
Director:Dr. Hamid Mahmoodi
Project Type:Motion Estimator Design & Implementation
Project Methodology
Our approach to VLSI design
- 1.Theoretical Foundation: Established design principles and architecture
- 2.Component Design: Individual circuit elements were designed and optimized
- 3.Verification: DRC and LVS checks performed on all components
- 4.Integration: Components integrated into complete motion estimator
- 5.Implementation: HDL to GDSII using Synopsys tools
- 6.Documentation: Comprehensive documentation of design and results